The AMD64 architecture [AMD64] is an extension of x86 instruction
set to enable 64-bit computing while remaining compatible with existing x86
software. The CPU can operate in 64-bit mode, where semantic of several x86
instructions has been changed. Most notably:
- Single byte encoding of inc and dec instructions is
no longer available. Instead the opcodes are used to encode a new
prefix REX with four one-bit arguments. First argument
is used to overwrite instruction operand size into 64 bits. Other
three are used to increase amount of general purpose registers from
8 to 16.
- New 64-bit addressing mode is used by default. Prefix is available
to overwrite into 32-bit addressing when needed.
- One of multiple possible encodings of direct addressing has been
changed into instruction pointer relative addressing.
relative addressing is now one byte shorter than direct addressing.
- Default operand size remains 32-bit, however
stack manipulation instructions, such as push and pop
defaults to 64-bit operand size.
- The immediate operands of instructions has not been extended to 64 bits
to keep instruction size smaller, instead they remain 32-bit sign
extended. Additionally the movabs instruction to load arbitrary 64-bit
constant into register and to load/store integer register from/to
arbitrary constant 64-bit address is available.
- Several new instructions have been added to allow 64-bit conversions
of data types.
Unlike earlier 64-bit architectures GCC has been ported to, some AMD64 features are
unique, such as CISC instruction set, generally usable IP relative
addressing, partial support for 64-bit immediate operands and more.